

        /*              file mfp_defs.h                 */

        /* addresses for Multi-Function Peripheral chip */

#define MFP     0x80000         /* 68901 MFP address */
#define GPIO    (MFP+0x01)      /* General Purpose I/O Register */
#define AER     (MFP+0x03)      /* Active Edge Register */
#define DDR     (MFP+0x05)      /* Data Direction Register */
#define IERA    (MFP+0x07)      /* Interrupt Enable Register A */
#define IERB    (MFP+0x09)      /* Interrupt Enable Register B */
#define IPRA    (MFP+0x0b)      /* Interrupt Pending Register A */
#define IPRB    (MFP+0x0d)      /* Interrupt Pending Register B */
#define ISRA    (MFP+0x0f)      /* Interrupt In-Service Register A */
#define ISRB    (MFP+0x11)      /* Interrupt In-Service Register B */
#define IMRA    (MFP+0x13)      /* Interrupt Mask Register A */
#define IMRB    (MFP+0x15)      /* Interrupt Mask Register B */
#define VR      (MFP+0x17)      /* Vector Register */
#define TACR    (MFP+0x19)      /* Timer A Control Register */
#define TBCR    (MFP+0x1b)      /* Timer B Control Register */
#define TCDCR   (MFP+0x1d)      /* Timers C & D Control Register */
#define TADR    (MFP+0x1f)      /* Timer A Data Register */
#define TBDR    (MFP+0x21)      /* Timer B Data Register */
#define TCDR    (MFP+0x23)      /* Timer C Data Register */
#define TDDR    (MFP+0x25)      /* Timer D Data Register */
#define UCR     (MFP+0x29)      /* USART Control Register */
#define RSR     (MFP+0x2b)      /* USART Receiver Status Register */
#define TSR     (MFP+0x2d)      /* USART Transmitter Status Register */
#define UDR     (MFP+0x2f)      /* USART Data Register */


        /* input/output device line designations */

#define DEVICE_1        3       /* device 1 - GPIO line 3 */
#define DEVICE_2        0       /* device 2 - GPIO line 0 */
#define DEVICE_3        7       /* device 3 - GPIO line 7 */




